| Specifications |
| Holder Type: |
VCXO3225T3.3-4pad 3.3V (Voltage code is "3.3" ) |
| Frequency Range: |
1.000 MHz to 50.0 MHz ( Fun. frequency crystal used ) |
| Initial Freq. Accuracy (at 25 °C): |
To tune to the nominal frequency with Vc = 1.65V ±0.2V |
| Frequency Stability at 25°C/Deviation: |
Standard: ±80ppm (typ.) |
| Operating Temperature Range: |
-10°C to +70°C / -40°C to 85°C, Storage Temp. -50°C to +105°C |
| Power Supply Voltage (Vdd): |
+3.3V DC ± 10% |
| Maximum Supply Current: |
20 mA max.( Frequency dependent) |
| Output Load: |
2 TTL gates max. / CMOS 15pF (typ.) |
| Output "1" Level (V0H): |
2.4V (min.) TTL l 2.97V (min.) CMOS |
| Output "0" Level (V0L): |
0.4V (min.) TT l 0.33V (min.) CMOS |
| Output Symmetry (Duty Cycle): |
40/60% (45/55% optional) |
| Voltage Control: |
0.9V DC Center / 0.00V to 1.8V Range |
| Linearity: |
6% typical; 10% max. |
| Rise/Fall Time: |
6ns (max.) 4ns (typ.) Measured between 0.4V and 2.4V |
| Input Impedance: |
1MOhm min. |
| Integrated Phase Jitter: |
1 ps max. (12 kHz to 20 MHz) |
| Phase Noise (27MHz at 3.3V): |
-75dBc/Hz at 10Hz offset -145dBc/Hz at 10kHz offset
-104dBc/Hz at 100Hz offset -152dBc/Hz at 100kHz offset
-132dBc/Hz at 1kHz offset -150dBc/Hz at 1MHz offset |
| Start Up Time: |
10 ms (max.), 5ms (typ.) |
| Aging: |
±3 ppm per year (max.) |
| Reflow Condition: |
10 sec. max. at 260°C |
